If you're unfamiliar with I²S to make no head or tail of those three sockets, it's an ancient digital standard for transmitting digital signal across circuit traces such that l/r channel data and clock signal run on parallel legs so neither channels nor clock must be extracted at the receive end from a serialized signal. It was never intended to be used for external signal transmission. When industrious designers started to split the transport/DAC whole into two halves, someone had the bright idea to apply I²S down a cable with connectors. It might have been Audio Alchemy. There simply was no industry provision much less standard for it. So engineers got creative. I²S showed up on S-video plugs, later on 4 x BNC as with Ancient Audio, B.M.C. and C.E.C. Today it's mostly HDMI/RJ45 sockets. But just because two send/receive components share the same sockets doesn't guarantee a handshake. That's up to shared pin configurations. Here Denafrips DACs are one of the very few with adaptable pin assignments. Consult the owner's manual on how to do that with the frontal controls. Like USB (with driver for Windows), I²S isn't sample-rate limited to far eclipse the older 192kHz limit of S/PDIF. If desired—many feel that upsampling on the send rather than receive end increases transmission jitter—you could feed the Plus in NOS mode a 44.1kHz signal upsampled x 32 in player software to receive 1'411.2kHz over I²S. Would that be a good thing? Find out. Compare it to transmitting native Redbook signal, then letting the DAC upsample x 32 with its own FPGA. Then compare that to setting the DAC to NOS mode for zero upsampling. Whatever you like best wins.
In this photo, we see the massive casing for the new oven-controlled super clocks…
… and the R2R resistor array with its ultra-fast CMOS switches controlled by FPGA code.
On multi-paralleled small capacitors, "the principle of an electrolytic capacitor is based on two metal plates with a central dielectric which creates a relatively large inductive value. The consequence of high inductance is non-ideal filtering of AC power with very low and high-frequency ripple. By using arrays of many small caps in parallel to replace the large electrolytic capacitor, we avoid these drawbacks. Greatly reduced inductance improves the power supply's ripple suppression and quietness."
On DSD, "DSD or direct bit stream is a pulse-density modulation format which can be decoded with an analog low-pass filter to remove out-of-band HF noise. That's the DSD hardware solution. It shares similarities with the core principle of digital amplifiers. It's simply that the analog filter won't ever be as steep as a digital filter slope so out-of-band noise is never completely filtered out. Thus properly done, the hardware approach to DSD conversion is far from simple.
"What we apply is a technique called FIR filter-core circuit. The famous DSD1700 chip used eight levels of FIR filtering. We use 32."